#include <dspSimulator/instruction/or.h>

bool OR::checkCondition(std::shared_ptr<DspMachine> dspMachine) {
    if (isCompactInstruction) {
        return true;
    } else {
        return checkStandardCondition(dspMachine);
    }
}

void OR::loadInstIRIntoJit(llvm::LLVMContext *llvmContext, llvm::Module *module,
                           std::shared_ptr<llvm::IRBuilder<>> irBuilder) {
    llvm::FunctionType *funcType = llvm::FunctionType::get(irBuilder->getVoidTy(), false);

    // --------------------------------- OR (.unit) op1,xop2,dst ---------------------------------------------
    {
        llvm::Function *orS = llvm::Function::Create(funcType, llvm::GlobalValue::ExternalLinkage, "ORKind1",
                                                     module);
        llvm::BasicBlock *entryBB = llvm::BasicBlock::Create(*llvmContext, "entry", orS);
        irBuilder->SetInsertPoint(entryBB);

        auto dstRegPtr = getDstLoRegPtr(module, irBuilder);

        auto src1RegPtr = getSrc1LoRegPtr(module, irBuilder);
        auto src1Reg = irBuilder->CreateLoad(src1RegPtr);

        auto src2RegPtr = getSrc2LoRegPtr(module, irBuilder);
        auto src2Reg = irBuilder->CreateLoad(src2RegPtr);

        auto res = irBuilder->CreateOr(src1Reg, src2Reg);
        irBuilder->CreateStore(res, dstRegPtr);
        irBuilder->CreateRetVoid();
    }

    // --------------------------------- OR (.unit) scst5,xop2,dst ---------------------------------------------
    {
        llvm::Function *orS = llvm::Function::Create(funcType, llvm::GlobalValue::ExternalLinkage, "ORKind2",
                                                     module);
        llvm::BasicBlock *entryBB = llvm::BasicBlock::Create(*llvmContext, "entry", orS);
        irBuilder->SetInsertPoint(entryBB);

        auto dstRegPtr = getDstLoRegPtr(module, irBuilder);

        auto cst5 = getCstN(module, irBuilder, 5);
        auto scst5 = irBuilder->CreateSExt(cst5, irBuilder->getInt32Ty());

        auto src2RegPtr = getSrc2LoRegPtr(module, irBuilder);
        auto src2Reg = irBuilder->CreateLoad(src2RegPtr);

        auto res = irBuilder->CreateOr(scst5, src2Reg);
        irBuilder->CreateStore(res, dstRegPtr);
        irBuilder->CreateRetVoid();
    }
}

std::shared_ptr<Instruction> OR::decode(std::shared_ptr<InstInfo> instInfo, u64 baseCycle) {
    std::shared_ptr<OR> _or;
    auto dspInstInfo = std::dynamic_pointer_cast<DspInstInfo>(instInfo);
    bool isStandardInst = dspInstInfo->isStandardInstruction();
    if (isStandardInst) {
        auto data = vectorToBitSet<32>(dspInstInfo->getBits());
        if (checkBits<10>(data, 2, 0b0110111000) && existStandardCondition(data)) {
            _or = std::make_shared<OR>(dspInstInfo->getAddress(), baseCycle);
            _or->creg_z = extractBits<4>(data, 28);
            _or->dst = extractBits<5>(data, 23).to_ulong();
            _or->src2 = extractBits<5>(data, 18).to_ulong();
            _or->src1 = extractBits<5>(data, 13).to_ulong();
            _or->x = data[12];
            _or->s = data[1];
            _or->p = data[0];
            if (_or->s == 0) {
                _or->funcUnit = FuncUnit::S1;
            } else {
                _or->funcUnit = FuncUnit::S2;
            }
            _or->instFormat = InstFormat::Kind1;
        } else if (checkBits<10>(data, 2, 0b0110101000) && existStandardCondition(data)) {
            // .S scst5,xop2,dst
            _or = std::make_shared<OR>(dspInstInfo->getAddress(), baseCycle);
            _or->creg_z = extractBits<4>(data, 28);
            _or->dst = extractBits<5>(data, 23).to_ulong();
            _or->src2 = extractBits<5>(data, 18).to_ulong();
            _or->cst = extractBits<5>(data, 13).to_ulong();
            _or->x = data[12];
            _or->s = data[1];
            _or->p = data[0];
            if (_or->s == 0) {
                _or->funcUnit = FuncUnit::S1;
            } else {
                _or->funcUnit = FuncUnit::S2;
            }
            _or->instFormat = InstFormat::Kind2;
        } else if (checkBits<10>(data, 2, 0b1000111100) && existStandardCondition(data)) {
            // .D scst5,xop2,dst
            _or = std::make_shared<OR>(dspInstInfo->getAddress(), baseCycle);
            _or->creg_z = extractBits<4>(data, 28);
            _or->dst = extractBits<5>(data, 23).to_ulong();
            _or->src2 = extractBits<5>(data, 18).to_ulong();
            _or->cst = extractBits<5>(data, 13).to_ulong();
            _or->x = data[12];
            _or->s = data[1];
            _or->p = data[0];
            if (_or->s == 0) {
                _or->funcUnit = FuncUnit::D1;
            } else {
                _or->funcUnit = FuncUnit::D2;
            }
            _or->instFormat = InstFormat::Kind2;
        } else if (checkBits<10>(data, 2, 0b1111111110) && existStandardCondition(data)) {
            _or = std::make_shared<OR>(dspInstInfo->getAddress(), baseCycle);
            _or->creg_z = extractBits<4>(data, 28);
            _or->dst = extractBits<5>(data, 23).to_ulong();
            _or->src2 = extractBits<5>(data, 18).to_ulong();
            _or->src1 = extractBits<5>(data, 13).to_ulong();
            _or->x = data[12];
            _or->s = data[1];
            _or->p = data[0];
            if (_or->s == 0) {
                _or->funcUnit = FuncUnit::L1;
            } else {
                _or->funcUnit = FuncUnit::L2;
            }
            _or->instFormat = InstFormat::Kind1;
        } else if (checkBits<10>(data, 2, 0b1111110110) && existStandardCondition(data)) {
            _or = std::make_shared<OR>(dspInstInfo->getAddress(), baseCycle);
            _or->creg_z = extractBits<4>(data, 28);
            _or->dst = extractBits<5>(data, 23).to_ulong();
            _or->src2 = extractBits<5>(data, 18).to_ulong();
            _or->cst = extractBits<5>(data, 13).to_ulong();
            _or->x = data[12];
            _or->s = data[1];
            _or->p = data[0];
            if (_or->s == 0) {
                _or->funcUnit = FuncUnit::L1;
            } else {
                _or->funcUnit = FuncUnit::L2;
            }
            _or->instFormat = InstFormat::Kind2;
        }
    } else {
        auto data = vectorToBitSet<16>(dspInstInfo->getBits());
        if (checkBits<3>(data, 1, 0b100) && data[10] == 1 && data[11] == 0 && checkBits<2>(data, 5, 0b01)) {
            _or = std::make_shared<OR>(dspInstInfo->getAddress(), baseCycle);
            _or->isCompactInstruction = true;
            _or->compactInstKind = "L2c";
            _or->src1 = extractBits<3>(data, 13).to_ulong();
            _or->x = data[12];
            _or->src2 = extractBits<3>(data, 7).to_ulong();
            _or->dst = data[4];
            _or->s = data[0];
            if (_or->s == 0) {
                _or->funcUnit = FuncUnit::L1;
            } else {
                _or->funcUnit = FuncUnit::L2;
            }
            _or->DSZ = dspInstInfo->getDSZ();
            _or->RS = dspInstInfo->getRS();
            _or->SAT = dspInstInfo->getSAT();
            _or->PROT = dspInstInfo->getPROT();
            _or->BR = dspInstInfo->getBR();
            _or->p = dspInstInfo->getP();
            _or->fixUpRegOnCompactInstruction();
            _or->instFormat = InstFormat::Kind1;
        }
    }
    return _or;
}

void OR::executeCustom(std::shared_ptr<TargetMachine> targetMachine, ExecutePhase executePhase) {

}

std::shared_ptr<DspInstruction> OR::clone() {
    return std::make_shared<OR>(*this);
}

std::string OR::toString() const {
    std::string res;
    if (!isCompactInstruction) {
        res += getStandardConditionString() + " ";
    }

    res += m_name + " " + FuncUnitName[static_cast<u32>(funcUnit)] + " ";

    if (instFormat == InstFormat::Kind1) {
        res += getSrc1Reg32Name() + "," + getSrc2Reg32Name() + "," + getDstReg32Name();
    } else if (instFormat == InstFormat::Kind2) {
        res += " " + dec2hex(extractBitsAndToInt<5>(cst)) + "," + getSrc2Reg32Name() +
               "," + getDstReg32Name();
    }
    return res;
}